Local oxidation of silicon (LOCOS) is a method of forming field oxide regions for integrated circuitry on semiconductive material wafers. The field oxide regions can be utilized to electrically separate adjacent electrical devices. A LOCOS process is described with reference to FIGS. 1-4.
Referring to FIG. 1, a semiconductive material wafer fragment 10 is illustrated at a preliminary step of the LOCOS process. Wafer fragment 10 comprises a semiconductive material wafer substrate 12, having a pad oxide layer 14 and a silicon nitride layer 16 formed thereover. Pad oxide layer 14 can comprise, for example, silicon dioxide. Pad oxide layer 14 is typically formed to a thickness of from about 20 nanometers to about 60 nanometers, and silicon nitride layer 16 is typically formed to a thickness of from about 100 nanometers to about 200 nanometers. Substrate 12 can comprise, for example, lightly doped monocrystalline silicon. To aid in interpretation of the claims that follow, the term "semiconductive substrate" or "semiconductor substrate" is defined to mean any construction comprising semiconductive material, including, but not limited to, bulk semiconductive materials such as a semiconductive wafer (either alone or in assemblies comprising other materials thereon), and semiconductive material layers (either alone or in assemblies comprising other materials). The term "substrate" refers to any supporting structure, including, but not limited to, the semiconductive substrates described above.
A patterned masking layer 18 is provided over silicon nitride layer 16. Patterned masking layer 18 can comprise, for example, photoresist patterned by a photolithographic process. Patterned masking layer 18 covers some portions (labeled as 20) of silicon nitride layer 16, and leaves other portions (labeled as 22) uncovered.
Referring to FIG. 2, wafer fragment 10 is subjected to etching conditions which remove uncovered portions 22 of silicon nitride material 16 to form openings 26. The etching also extends through pad oxide layer 14 to expose portions 31 of a surface of silicon layer 12. The etching can either stop at an upper surface of substrate 12 (as shown), or in other processing (not shown) can extend partially into substrate 12. The etching of openings 26 forms covered portions 20 of pad oxide 14 and silicon nitride 16 into masking blocks 30.
Referring to FIG. 3, masking layer 18 (FIG. 2) is removed and wafer fragment 10 is subjected to oxidizing conditions which oxidize the semiconductive material of substrate 12 to grow silicon dioxide between masking blocks 30 and thereby form field oxide regions 50. The oxidizing conditions can comprise, for example, wet oxidation conducted at temperatures of about 1,000.degree. C. for a time of from about two hours to about four hours.
Referring to FIG. 4, nitride layer 16 (FIG. 3) is removed to leave field oxide regions 50 over substrate 12. Field oxide regions 50 are joined by pad oxide 14 extending therebetween. In subsequent processing (not shown), pad oxide 14 can be stripped and replaced with another oxide layer. In further subsequent processing, semiconductor devices, such as, for example, transistors, can be formed between field oxide regions 50. Such devices will then be electrically isolated between regions by field oxide regions 50.
A difficulty which can occur during the above-discussed LOCOS processing is that the nitride material 16 of masking blocks 30 can cause tensile stress relative to underlying silicon-containing layers, which can result in deformation and dislocation of field oxide regions 50. The problems associated with nitride-induced tensile stress increase as the spacing between masking blocks 30 is decreased. A continuing goal in semiconductor processing is to reduce spacings between adjacent devices. Accordingly, it would be desirable to alleviate the nitride-induced tensile stress associated with LOCOS processing.